(Hong Kong)
Product Summary
The CY7C1386D200AXC SRAM integrates 512K x 36/1M x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive edge triggered clock input (CLK). The CY7C1386D200AXC operates from a +3.3V core power supply while all outputs operate with a +3.3V or +2.5V supply.
Parametrics
CY7C1386D200AXC absolute maximum ratings: (1)Storage Temperature: –65 to +150℃; (2)Ambient Temperature with Power Applied: –55 to +125℃; (3)Supply Voltage on VDD Relative to GND:–0.5V to +4.6V; (4)Supply Voltage on VDDQ Relative to GND:–0.5V to +VDD; (5)DC Voltage Applied to Outputs; (6)in Tri-State:–0.5V to VDDQ + 0.5V; (7)DC Input Voltage:–0.5V to VDD + 0.5V; (8)Current into Outputs (LOW):20 mA; (9)Static Discharge Voltage: ＞2001V(per MIL-STD-883, Method 3015); (10)Latch-up Current:＞200 mA.
Features
CY7C1386D200AXC features: (1)Supports bus operation up to 250 MHz; (2)Available speed grades are 250, 200, and 167 MHz; (3)Registered inputs and outputs for pipelined operation; (4)Optimal for performance (double-cycle deselect); (5)Depth expansion without wait state; (6)3.3V core power supply (VDD); (7)2.5V or 3.3V IO power supply (VDDQ); (8)Fast clock-to-output times; (9)2.6 ns (for 250 MHz device).
Diagrams
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